Huawei Li
Institute of Computing Technology
Chinese Academy of Sciences
China
Biography
Huawei Li received the B.S. degree in computer science from Xiangtan University, Xiangtan, China, in 1996, and the M.S. and Ph.D. degrees from the Institute of Computing Technology (ICT), Chinese Academy of Sciences (CAS), Beijing, China, in 1999 and 2001, respectively. She has been a Professor at ICT, CAS since 2008. She visited the University of California, Santa Barbara from 2009 to 2010. Her research interests include testing of VLSI/SOC circuits, design verification, design for reliability, and error tolerant computing. She has published over 130 technical papers, and holds 20 Chinese Patents in these areas.   She currently serves as an Associate Editor of the IEEE Transaction on VLSI Systems, and serves on the editorial board of the Journal of Computer-Aided Design and Computer Graphics (in Chinese), and the Journal of Computer Research and Development (in Chinese). She was the Technical Program Co-Chair of IEEE Asian Test Symposium in 2007 and the General Co-Chair in 2014. She served as the Technical Program Chair of IEEE Workshop on RTL and High Level Testing (WRTLT) in 2003 and the Technical Program Vice-Chair in 2013. She has served as the Steering Committee Chair of WRTLT and the Steering Committee member of ATS since 2014, served as the Secretary General of the China Computer Federation Technical Committee on Fault-Tolerant Computing since 2008, and served on the technical program committees for several IEEE conferences. Huawei Li received the B.S. degree in computer science from Xiangtan University, Xiangtan, China, in 1996, and the M.S. and Ph.D. degrees from the Institute of Computing Technology (ICT), Chinese Academy of Sciences (CAS), Beijing, China, in 1999 and 2001, respectively. She has been a Professor at ICT, CAS since 2008. She visited the University of California, Santa Barbara from 2009 to 2010. Her research interests include testing of VLSI/SOC circuits, design verification, design for reliability, and error tolerant computing. She has published over 130 technical papers, and holds 20 Chinese Patents in these areas.   She currently serves as an Associate Editor of the IEEE Transaction on VLSI Systems, and serves on the editorial board of the Journal of Computer-Aided Design and Computer Graphics (in Chinese), and the Journal of Computer Research and Development (in Chinese). She was the Technical Program Co-Chair of IEEE Asian Test Symposium in 2007 and the General Co-Chair in 2014. She served as the Technical Program Chair of IEEE Workshop on RTL and High Level Testing (WRTLT) in 2003 and the Technical Program Vice-Chair in 2013. She has served as the Steering Committee Chair of WRTLT and the Steering Committee member of ATS since 2014, served as the Secretary General of the China Computer Federation Technical Committee on Fault-Tolerant Computing since 2008, and served on the technical program committees for several IEEE conferences.
Research Interest
VLSI testing, design verification, design for reliability, fault/error tolerant computing
Publications
-
Ying Wang, Lei Zhang, Yinhe Han, Huawei Li, Xiaowei Li, “Economizing TSV resources in 3D Network-on-Chip designâ€, IEEE Transactions on Very Large Scaled Integration Systems (TVLSI), Vol. 23, No.3, pp. 493-506, 2015.