Engineering Experts

Chrysostomos Nicopoulos

Department of Electrical and Computer Engineering
Cyprus University of Technology

Chrysostomos Nicopoulos


Chrysostomos Nicopoulos is an Assistant Professor in the Department of Electrical and Computer Engineering (ECE) at the University of Cyprus. Chrysostomos received the B.S. and Ph.D. degrees in Electrical Engineering (specializing in Computer Engineering) from the Pennsylvania State University, USA, in 2003 and 2007, respectively. As a member of the Microsystems Design Laboratory at Penn State, Chrysostomos was actively involved in the research of packet-based Networks-on-Chip (NoC) and their implementation in multicore computer architectures. His Ph.D. dissertation, titled: "Network-on-Chip Architectures: A Holistic Design Exploration," received the 2008 Outstanding Dissertation Award in the area of "New directions in logic and system design" by the European Design and Automation Association (EDAA). From 2007 to 2008, he worked as a post-doctoral research associate in the Processor Architecture Laboratory at the École Polytechnique Fédérale de Lausanne (EPFL), Switzerland. He is currently the director of the multicore Computer Architecture Laboratory (multiCAL) at the University of Cyprus. His research interests lie in the areas of: computer architecture, multi-/many-core microprocessor and system design, architectural support for massively parallel computing, and Networks-on-Chip.

Research Interest

Multi-/Many-Core Computer Architecture Microprocessor & System Design Architectural Support for Massively Parallel Computing Architectural Challenges in Terascale Integration Network-on-Chip (NoC) Architectures On-Chip Interconnection Networks Heterogeneous Architectures (Combining CPU + GPU + Custom Accelerators) General-Purpose Computing on GPU (GPGPU) for the Acceleration of Multimedia Applications 3D System Architectures Emerging Memory Technologies (Phase-Change RAM)


  • J. Kim, C.A. Nicopoulos, D. Park, R. Das, Y. Xie, N. Vijaykrishnan, and C.R. Das, "A Novel Dimensionally-Decomposed Router for On-Chip Communication in 3D Architectures," in Proceedings of the 34th Annual International Symposium on Computer Architecture (ISCA), pp. 138-149, 2007. [12 pages – Premiere conference in Computer Architecture – extremely competitive]

  • R. Das, A.K. Mishra, C.A. Nicopoulos, D. Park, N. Vijaykrishnan, R. Iyer, M.S. Yousif, C.R. Das, "Performance and Power Optimization through Data Compression in Network-on-Chip Architectures," in Proceedings of the 14th International Symposium on High-Performance Computer Architecture (HPCA), pp. 215-225, 2008. [12 pages – Premiere conference in Computer Architecture – extremely competitive]

  • C.A. Nicopoulos, S. Srinivasan, A. Yanamandra, D. Park, N. Vijaykrishnan, C.R. Das, and M.J. Irwin, "On the Effects of Process Variation in Network-on-Chip Architectures," accepted (to appear in print; published online in 10.2008) in the IEEE Transactions on Dependable and Secure Computing (TDSC).

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