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Trancoso Pedro

ASSOCIATE PROFESSOR
Department of Computer Science
Cyprus University of Technology
Cyprus

Trancoso Pedro

Biography

Pedro Trancoso is an Associate Professor at the Department of Computer Science at the University of Cyprus, which he joined in 2002. He has a PhD and MSc. in Computer Science from the University of Illinois at Urbana-Champaign, USA. Currently his research team, Computer Architecture, Systems and Performance Evaluation Research - CASPER (www.cs.ucy.ac.cy/carch/casper) is composed of 2 PhD students. The latest funding for his research include the participation in the UniServer EU H2020 project (3 years, starting 2/2016), Reversible Computation EU COST (4 years, started 4/2015), TERAFLUX EU FP7 IP project (4 years, completed in 2014) and the lending of a 48-core experimental processor, the Intel SCC, by the Intel Corporation. He is also a member of the IEEE, ACM, and the HiPEAC Network of Excellence.

Research Interest

Research in the area of Computer Architecture and include Multicore Architectures, Memory Hierarchy, Parallel Processing and Programming Models, Database Workloads, High-Performance Computing, and Approximate Computing.

Publications

  • C. Cascaval, P. Trancoso, V. K. Prasanna,2013 “Guest Editorial: Computing Frontiers,” International Journal of Parallel Programming 41(3): 355-356

  • R. Giorgi, R. M. Badia, F. Bodin, A. Cohen, P. Trancoso,et al, “TERAFLUX: Harnessing Dataflow in Next Generation Teradevices,” Microprocessors and Microsystems – Embedded Hardware Design 38(8): 976-990 (2014)

  • A. Diavastos, P. Trancoso, M. Lujan, I. Watson, “Integrating Transactions into the Data-Driven Multi-threading Model using the TFlux Platform,” International Journal of Parallel Processing (IJPP) 44(2): 257-277 (2016)

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