Ing. Jiřà Matoušek
Ph.D student
Department of Computer Systems
Central European Institute of Technology
Czech Republic
Biography
Ing. JiÅ™í Matoušek is currently a Ph.D student in the department of Computer Systems Central European Institute of Technology, Czech republic. He completed Bc., Information Technology, FIT BUT, Brno and Ing., Mathematical Methods in Information Technology, FIT BUT, Brno.
Research Interest
Hardware acceleration of processing network data using FPGA, partial dynamic reconfiguration of FPGA.
Publications
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MATOUÅ EK JiÅ™Ã. Analýza dynamických vlastnostà smÄ›rovacÃch tabulek pro efektivnÄ›jÅ¡Ã implementaci smÄ›rovánà v páteÅ™nÃch sÃtÃch. In: SbornÃk pÅ™ÃspÄ›vků PAD-2014 - elektronická verze. Liberec: Liberec University of Technology, 2014, pp. 129-134. ISBN 978-80-7494-027-9.
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KEKELY Lukáš, ŽÃDNÃK Martin, MATOUÅ EK Jiřà and KOŘENEK Jan. Fast Lookup for Dynamic Packet Filtering in FPGA. In: 17th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems. Warszawa: IEEE Computer Society, 2014, pp. 219-222. ISBN 978-1-4799-4558-0.
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MATOUÅ EK JiÅ™Ã, ANTICHI Gianni, LUÄŒANSKà Adam, MOORE Andrew W. and KOŘENEK Jan. ClassBench-ng: Recasting ClassBench After a Decade of Network Evolution. In: 2017 ACM/IEEE Symposium on Architectures for Networking and Communications Systems. Beijing: IEEE Computer Society, 2017, pp. 204-216. ISBN 978-1-5090-6386-4.
