Ing. Viktor Puš
Research Worker
Department of Computer Systems
Central European Institute of Technology
Czech Republic
Biography
Ing. Viktor Puš is currently a Research Worker in the department of Computer Systems Central European Institute of Technology, Czech republic. He completed Ing. (MSc) in Computer systems and networks, Faculty of Information Technology,TU Brno, Czech Republic.
Research Interest
FPGA technology, High-speed network traffic processing, Application hardware acceleration, Packet classification.
Publications
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HEIDARI Mona, KEKELY Lukáš, PUÅ Viktor, BENÃÄŒEK Pavel and KOŘENEK Jan. Trade-offs and Progressive Adoption of FPGA Acceleration in Network Traffic Monitoring. In: 2014 24th International Conference on Field Programmable Logic and Applications (FPL 2014). Munich: IEEE Circuits and Systems Society, 2014, pp. 264-267. ISBN 978-3-00-044645-0.
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KEKELY Lukáš, KUČERA Jan, PUŠViktor, KOŘENEK Jan and VASILAKOS Athanasios. Software Defined Monitoring of Application Protocols. IEEE Transactions on Computers. 2015, vol. 65, no. 2, pp. 615-626. ISSN 0018-9340.
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MATOUŠEK Denis, KOŘENEK Jan and PUŠViktor. High-speed Regular Expression Matching with Pipelined Automata. In: Proceedings of the 2016 International Conference on Field Programmable Technology. Xi'an: IEEE Computer Society, 2016, pp. 93-100. ISBN 978-1-5090-5602-6.
