Jakub Lojda
Ph.D student
Department of Computer Systems
Central European Institute of Technology
Czech Republic
Biography
Jakub Lojda is currently a Ph.D student In the department of Department of Computer Systems Central European Institute of Technology, Czech republic. He published more than 10 research papers.
Research Interest
Fault tolerant systems (on-line testing techniques, checkers, dependability models, partial dynamic reconfiguration based on an FPGA, overload prevention solutions for embedded systems, The use of functional verification outputs for the verification of fault tolerance properties of electromechanical systems, the use of fault injection. The design of fault tolerant neural networks, the verification of fault tolerance parameters.
Publications
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PODIVÃNSKà Jakub and KOTÃSEK ZdenÄ›k. The Use of Functional Verification for Monitoring Impact of Faults in SRAM-based FPGAs. In: Proceedings of the 5th Prague Embedded Systems Workshop. Roztoky u Prahy: Faculty of Information Technology, Czech Technical University, 2017, pp. 81-82. ISBN 978-80-01-06178-7.
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LOJDA Jakub and KOTÃSEK ZdenÄ›k. Automatizace návrhu systémů odolných proti poruchám pomocà vysokoúrovňové syntézy. In: PoÄÃtaÄové architektury & diagnostika 2017. Smolenice: Slovak University of Technology in Bratislava, 2017, pp. 59-62. ISBN 978-80-972784-0-3.
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LOJDA Jakub and KOTÃSEK ZdenÄ›k. A Basic Approach to Fault Tolerance of Data Paths of HLS-synthesized Systems and its Evaluation. In: Proceedings of the 5th Prague Embedded Systems Workshop. Roztoky u Prahy: Faculty of Information Technology, Czech Technical University, 2017, pp. 79-80. ISBN 978-80-01-06178-7.
