Vojtech Mrazek
Ph.D student
Evolvable Hardware
Central European Institute of Technology
Czech Republic
Biography
Vojtech Mrazek received a MSc degree in computer science and engineering from the Faculty of Information Technology, Brno University of Technology, Czech Republic in 2014. Currently, he is a PhD student at the Faculty of Information Technology with Evolvable Hardware Group. He has authored or co-authored over 10 conference/journal papers focused on evolvable hardware and hardware design. His research interests are evolvable hardware, power-aware design, approximate computing and genetic programming.
Research Interest
Evolvable Hardware Research.
Publications
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SEKANINA Lukáš, VAÅ ÃÄŒEK ZdenÄ›k and MRÃZEK VojtÄ›ch. Approximate Circuits in Low-Power Image and Video Processing: The Approximate Median Filter. Radioengineering. 2017, vol. 26, no. 3, pp. 623-632. ISSN 1210-2512.
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MRÃZEK VojtÄ›ch, HRBÃÄŒEK Radek, VAÅ ÃÄŒEK ZdenÄ›k and SEKANINA Lukáš. EvoApprox8b: Library of Approximate Adders and Multipliers for Circuit Design and Benchmarking of Approximation Methods. In: Proc. of the 2017 Design, Automation & Test in Europe Conference & Exhibition (DATE). Lausanne: European Design and Automation Association, 2017, pp. 258-261. ISBN 978-3-9815370-9-3.
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MRÃZEK VojtÄ›ch and VAÅ ÃÄŒEK ZdenÄ›k. Parallel Optimization of Transistor Level Circuits using Cartesian Genetic Programming. In: GECCO Companion '17 Proceedings of the Companion Publication of the 2017 on Genetic and Evolutionary Computation Conference. Berlin: Association for Computing Machinery, 2017, pp. 1849-1856. ISBN 978-1-4503-4939-0.
