Dr. Stephan Held
Professor
Discrete Mathematics
Research Institute for Discrete Mathematics
Germany
Biography
His Research Interests:Combinatorial Optimization, Graph Coloring: exactcolors a "fast" code for stable set and coloring problems. VLSI-Design (esp. Timing Analysis and Optimization), Clock Scheduling and Construction (Instances for the minimum mean cycle problem), Gate Sizing, Repeater Trees, Threshold Voltage Optimization, Logic Resynthesis, Timing Driven Placement & Routing.
Research Interest
Discrete Mathematics
Publications
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S. Held and N. Kämmerling: Two-Level Rectilinear Steiner Trees, Computational Geometry 61, 2017, 48--59 (link, preprint , short version at EUROCG 2015).
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S. Held, D. Müler, D. Rotter, R. Scheifele, V. Traub, and J. Vygen: Global Routing with Timing Constraints, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2017, accepted (10.1109/TCAD.2017.2697964), (preprint).
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S. Held and S.T.Spirkl: Binary Adder Circuits of Asymptotically Minimum Depth, Linear Size, and Fan-Out Two. Accepted for TALG , 2017 ( preprint ).
