Mazad Zaveri
Assistant Professor
School of Engineering and Applied Sciences
Ahmedabad University, Ahmedabad
India
Biography
In December 2014, Mazad S. Zaveri joined the Institute of Engineering and Technology (now known as SEAS) - Ahmedabad University (AU), as assistant professor. During 2010-2014, he worked as assistant professor, at the Dhirubhai Ambani Institute of Information and Communication Technology, Gandhinagar. During Jan-May 2014, he was also a visiting faculty at the Indian Institute of Information Technology, Vadodara. During 2003-2009, he worked as research assistant at the (erstwhile "Oregon Graduate Institute") Oregon Health and Science University, and Portland State University. Mazad S. Zaveri got his PhD in Electrical and Computer Engineering from Portland State University in 2009, his MSE in Electrical Engineering from Arizona State University in 2003, and his BE in Instrumentaton and Control Engineering from Gujarat University in 2000. He passed his HSC and SSC (school certification exams) from St. Xavier's School - Loyola Hall, Ahmedabad. Mazad S. Zaveri's research interests are in the digital "neuro-morphic VLSI" area, which means digital VLSI circuits/architectures/platforms that emulate neural networks (or other more abstract cortical models). He has guided several MTech and BTech Theses/Projects, mostly related to the digital neuro-morphic VLSI area. Mazad S. Zaveri has taught courses related to the VLSI/Electronics area, such as: Introduction to VLSI design, VLSI Sub-systems, Digital Logic Design, and Basic Electronic Circuits.
Research Interest
Digital CMOS VLSI Circuits and Sub-systems
Publications
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Manan Mewada, Mazad Zaveri, "An Improved Input Test Pattern for Characterization of Full Adder Circuitsâ€, in International Conference on Multidisciplinary Research & Practice, AMA-Ahmedabad, 24th December 2015, pp. 222-226.
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Manan Mewada, Mazad Zaveri, “An Input Test Pattern for Characterization of a Full-Adder and n-bit Ripple Carry Adder,†in (IEEE sponsored) International Conference on Advances in Computing, Communications and Informatics, 21st-24th September 2016, LNMIIT-Jaipur, September 2016.
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Manan Mewada, Mazad Zaveri, “A Low-Power High-Speed Hybrid Full Adder," in (IEEE sponsored) International Symposium on VLSI Design and Test (VDAT), IIT-Guwahati, 24th-27th May 2016.