Rutu Parekh
Assistant ProfessorÂ
Information & Communication technology
Dhirubhai Ambani Institute of Information & Communication Technology
India
Biography
Assistant Professor in Dhirubhai Ambani Institute of Information and Communication Technology, Gandhinagar, India; also worked in ASIC Engineer eInfochips, Ahmedabad, India.
Research Interest
Develop models, codesign methodology and cosimulation of hybrid circuits of emerging nanoelectronic devices with CMOS technology, low voltage low power circuits, Phase Change Memory, MEMS devices and embedded systems.
Publications
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Gargave S. Single precision floating point matrix multiplier using low power arithmetic circuits (Doctoral dissertation, Dhirubhai Ambani Institute of Information and Communication Technology).
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Parekh R, Beaumont A, Beauvais J, Drouin D. Simulation and design methodology for hybrid SET-CMOS integrated logic at 22-nm room-temperature operation. IEEE transactions on electron devices. 2012 Apr;59(4):918-23.
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Parekh R, Beauvais J, Drouin D. SET logic driving capability and its enhancement in 3-D integrated SET–CMOS circuit. Microelectronics Journal. 2014 Aug 31;45(8):1087-92.
