Dr. Shirshendu Das
Assistant Professor
Computer Science and Engineering
Indian Institute of Information Technology, Guwahati
India
Biography
He is an Assistant Professor in the Department of CSE, Indian Institute of Information Technology Guwahati. He had joined the institute on 10th August 2015. Previously he did my M.Tech and PhD in CSE from Indian Institute of Technology Guwahati, under the guidance of Prof. Hemangee K. Kapoor. My academic details are: PhD from Indian Institute of Technology Guwahati in 2016 (January). Thesis: "Effective Utilization of LLCs by Managing Associativity, Placement and Mapping" (LLC means Last Level Cache). M.Tech (in CSE) from Indian Institute of Technology Guwahati in 2010 (July). MSc in Computer Science from Assam University Silchar, Assam in 2007 (June). He is an adventure loving person. He like cycling, trekking, road trip etc. It is his dream to travel all over India with his cycle and motorcycle :) . He also love to play badminton, football, and cricket.
Research Interest
Performance enhancement of LLCs in Tiled Based CMPs (TCMP). Minimising the on-chip communication latency for TCMP. Energy consumption and temperature optimisation of LLC, NoC and DRAM caches. Smart replacement policies for different NUCA (Non Uniform cache Access) based cache memory architectures.
Publications
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Shirshendu Das and H. K. Kapoor, “Victim Retention for Reducing Cache Misses in Tiled Chip Multiprocessors,†Journal of Microprocessors and Microsystems (Elsevier), 38 (4), (2014), 263–275.
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Shirshendu Das and H. K. Kapoor, “A Framework for Block Placement, Migration and Fast Searching in Tiled-DNUCA Architecture,†ACM Transactions on Design Automation of Electronic Systems (TODAES), 22(1), 2016.
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Shirshendu Das and H. K. Kapoor, “Dynamic Associativity Management in Tiled CMPs by Runtime Adaptation of Fellow Sets,†IEEE Transactions on Parallel and Distributed Systems (TPDS), accepted in January 2017.
