Gaurav Verma
Assistant Professor
Electronics and Communication Engineering
Jaypee Institute of Information Technology
India
Biography
Currently working as Asst. Professor with Jaypee University of Information Technology, Noida, Sector 62 campus, from July 2013 to till date. Worked as Asst. Professor and coordinator (first year) with Vishweshwarya Group of Institutions, Dadri, Greater Noida, from August 2012 to July 2013. Worked as Sr. Lecturer and Coordinator (M.Tech.) with Dehradun Institute of Technology, Dehradun, from October 2008 to July 2010. Worked as Sr. Lecturer with Dev Bhoomi Institute of Technology, Dehradun, from October 2007 to October 2008. Worked as Asst. Manager cum Embedded Trainer with CETPA INFOTECH PVT. LTD. (CIPL), from October 2005 to September 2007.
Research Interest
Digital Design using VHDL, Embedded Systems, Linux, Device Drivers, RTOS Sponsored R&D Projects: FPGA Implementation of Digital Controller for Gimbal Payload. This project has been implemented by keeping in mind the application of gimbal for the defence purpose at Instrument and Research Development Establishment (Ministry of Defence), Dehradun. A Gimbal is a mechanical arrangement, which is used to isolate the payload from the moving vehicle. This is particularly used in line of stabilization systems and inertial guidance systems.In this project, the discrete time Lead-Lag controller is considered and is implemented in a dedicated Spartan 3E FPGA, which is further used to control the Gimbal.
Publications
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Gaurav Verma, VikasVerma, Divya Sharma, Adesh Kumar, HimanshuVerma and KartikKalia, â€Design Goal Based Implementation of Energy Efficient Greek Unicode Reader for Natural Language Processing†International Journal of Smart Home, vol 10, No.3, pp. 181-190, March 2016. [INDEXED in SCOPUS]
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Gaurav Verma , Sushant Shekhar, Kumar Shashi Kant, VikasVerma, HimanshuVerma and Bishwajeet Pandey, “SSTL IO Standard Based Low Power Arithmetic Design Using CalanaKalanabhyam On FPGA†International Journal of Control and Automation, vol 9, No.4, pp. 271-278, April 2016. [INDEXED in SCOPUS]
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Gaurav Verma, ShikharMaheswari, Sukhbani Kaur Virdi, Neha Baishander, Ipsita Singh and Bishwajeet Pandey, “Low Power Squarer Design Using EkadhikenaPurvena on 28nm FPGA†International Journal of Control and Automation, vol 9, No.5, pp. 281-288, May 2016. [INDEXED in SCOPUS]
