Kirmender Singh
Assistant Professor
Electronics and Communication Engineering
Jaypee Institute of Information Technology
India
Biography
Kirmender singh completed his MTech in Microelectronics and Embedded technology from JIIT Noida and presently pursuing PhD. He have five year of industrial experience and three years of teaching experience prior to joining JIIT Noida in July 2004. Presently he is Assistant Professor in the Department of Electronics and Communication Engineering, Jaypee Institute of Information Technology, Sector 62, Noida..
Research Interest
VLSI
Publications
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K. Singh , A. B Bhattacharyya “ Analysis of Second-order Effect Components of Drain Conductance and Its Implication on Output Resistance of Wilson Current Mirrorâ€, IEEE 28th International Conference on VLSI Design(VLSID), Bangalore,( sister conferenceof IEEE DAC, DATE) Jan 3rd -7th , 2015 .
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“Transconductance Component Analysis of EKV MOSFET Model for CMOS Analog Design at 0.18μ Technology Nodeâ€, A. B. Bhattacharyya, K. Singh Sixth International Conference of Smart Material Structure and Systems(ISSS-2011) , Jan 4th -7th, 2012 , Indian Institute of Science(IISC) Bangalore.
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Transconductance Related Analysis of EKV MOSFET Model for a 0.35 μ CMOS Technology Node “, K. Singh , A. B. Bhattacharyya . IEEE Proceedings of the 17th International Conference “Mixed Design of Integrated Circuits and Systems (MIXDES-2010)â€, Wroclaw, Poland held on June 24-26 2010.
