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Prof. B.k. Mohanty

Assistant Professor
Faculty of Sciences
Jaypee University of Engineering & Technology
India

Biography

Received B.Sc and M.Sc degree (both with first-class honors) in Physics from Sambalpur University, Orissa, in 1987 and 1989, respectively. Received Ph.D degree in the area of VLSI for Digital Signal Processing from Berhampur University, Orissa in 2000. In 1992 he was selected by OPSC (Orissa Public Service Commission) and joined as faculty member in the Department of Physics, SKCG College (Autonomous) Paralakhemundi, Orissa. In 2001 he joined as Lecturer in EEE Department, BITS Pilani, Rajasthan. Then he joined as an Assistant Professor in the Department of ECE, Mody Institute of Education Research (Deemed University), Rajasthan. In 2003 he joined Jaypee University of Engineering and Technology, Guna, Madhya Pradesh, where he becomes Associate Professor in 2005 and full Professor in 2007. Currently he serves as the reviewers of IEEE Transactions on Circuits and Systems-II: Express Briefs, IEEE Transactions on Circuits and Systems for Video Technology, IEEE Transactions on Very Large Scale Integration (VLSI) Systems. IET Circuit Device and Technology and Journal of Circuit, System and Signal Processing, Springer. He has member of various technical committees of International Conferences Sponsored by IEEE. Track Chair of “Multimedia Signal Processing Track”, International Symposium on Consumer Electronics (ISCE2011), Singapore and “Digital System Design and Validation Track” track of International Symposium of Electronics System Design (ISED2011), Kochi, India. Rashtriya Gaurav Award for Meritorious Service, Outstanding Performance and Remarkable Role

Research Interest

DSP & VLSI Array Processing.

Publications

  • B.K.Mohanty and P.K.Meher, “A high-performance FIR filter architecture for fixed and reconfigurable applications”, IEEE Transaction on VLSI Systems. Vol. 24, No.2, pp. 444-452, Feb. 2016, SNIP: 2.139, SJR: 0.624, Impact Factor: 1.89, H- Index: 69.

  • S.K.Singhal and B.K.Mohanty “Efficient parallel architecture for fixed-coefficient and variable-coefficient FIR filters using distributed arithmetic”, Journal of Circuits, Systems, and Computers (JCSC), DOI.10.1142/S0218126616500730, March 2016, SCI (on-line available)

  • B.K.Mohanty, P.K.Meher, S.K.Singhal, and M.N.S.Swamy, “A High-Performance VLSI Architecture for Reconfigurable FIR using Distributed Arithmetic”, Journal of VLSI Integration, Elsevier, Vol.54, pp. 37-46, DOI.10.1016/j.vlsi.2016.01.006, June 2016, SCI

  • B.K.Mohanty, P.K.Meher and S. K. Patel, “LUT optimization for distributed arithmetic based block least mean square adaptive filter”, IEEE Transaction on Very Large Scale Integration Systems, Regular Papers, DOI:10.1109/TVLSI.2015.2472964. (On-line Available: IEEE Explore)

  • B.K.Mohanty, G. Singh, and G. Panda, “Hardware design for VLSI implementation of FxLMS and FsLMS based active noise controllers”, Circuits Systems and Signal Processing, Regular Papers, (Accepted)

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