Kunwar Singh

Biography

Mr. Kunwar Singh received his B.Tech in Electronics and Communication Engineering from GGSIP University, New Delhi and M.Tech in VLSI Design from CDAC, Noida in 2006 and 2009 respectively. He served as an intern in Cadence Design Systems during Feb. 2009 – Jul. 2009 where he worked as a product validation engineer in SPB group. He is currently serving as an Assistant Professor in the Division of ECE, NSIT wef Sep. 2013 and is working towards his PhD degree in the University of Delhi. Earlier, he has also served as Assistant Professor in the Department of Electrical Engineering, Delhi Technological University from Jul. 2010 – Sep. 2013. His research interests include Low power high performance digital CMOS circuits, CAD for VLSI Design, applications of artificial intelligence techniques in power-delay-area product optimization of digital CMOS integrated circuits, automated design and optimization of analog and mixed-signal integrated circuits, integrated circuit design using memristors. He has authored and co-authored over 14 research papers in the above areas in various international/national journals and conferences. He has filed one Indian and one US patent application.

Research Interest

Low power high performance digital CMOS circuits, CAD for VLSI Design, Applications of artificial intelligence techniques in power-delay-area Product optimization of digital CMOS integrated circuits, Automated design and optimization of analog and mixed-signal integrated circuits, Integrated circuit design using memristors.