Chan Pak Kwong
Associate Professor
School of Electrical & Electronic Engineering
Nanyang Technological University
Singapore
Biography
Dr. P.K. Chan received the B.Sc. (Hons) degree from the University of Essex, U.K., in 1987, the M.Sc. degree from the University of Manchester, Institute of Science and Technology (U.M.I.S.T.), U.K., in 1988, and the PhD degree from the University of Plymouth, U.K. in 1992. From 1989 to 1992, he was a Research Assistant with the University of Plymouth, working in the area of MOS continuous-time filters. In 1993, he joined the Institute of Microelectronics (IME) as a Member Technical Staff, where he designed high-performance analog/mixed-signal circuits for integrated systems and CMOS sensor interfaces for industrial applications. In 1996, He was a Staff Engineer with Motorola, Singapore where he developed the magnetic write channel for Motorola 1st generation hard-disk preamplifier. He joined Nanyang Technological University (NTU), Singapore in 1997, where he is an Associate Professor in the School of Electrical and Electronic Engineering. He served the Program Director (analog/mixed-signal IC and applications) for the Center for Integrated Circuits and Systems (CICS) from 2003 to 2010. He conducted numerous IC design short courses to the industry and design centers. He has served as a Guest Editor for Journal of Circuits, Systems and Computers on 2011 and 2012 Special Issues and for Sensors on 2016 Special Issue: "Smart Interface Circuits & Systems". He is a member of Analog Signal Processing Technical Committee (IEEE CAS Society).
Research Interest
mixed-mode circuits and systems, precision analog circuit design, integrated circuit analysis and circuit theory & applications. He initiated SENSOR CIRCUITS & SYSTEMS research
Publications
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K.C. Koay and P.K. Chan. (2016). A Low Energy-Noise 65nm CMOS Switched-Capacitor Resistive-Bridge Sensor Interface. IEEE Transactions on Circuits and Systems I-Regular Papers, .
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F. Xiao and P.K. Chan. (2017). A Performance-Aware Low-Quiescent Headphone Amplifier in 65nm CMOS. IEEE Journal of Solid-State Circuits, 52(2), 505-516.
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D. Wang, X.L. Tan and P.K. Chan. (2017). A 65 nm CMOS Constant Current Source with Reduced PVT Variation. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, .
