Chang Chip Hong
Associate Professor
School of Electrical & Electronic Engineering
Nanyang Technological University
Singapore
Biography
Dr Chang Chip Hong received the B.Eng. (Hons.) degree from the National University of Singapore, in 1989, and the M. Eng. and Ph.D. degrees from Nanyang Technological University (NTU), Singapore, in 1993 and 1998, respectively. He served as a Technical Consultant in industry prior to joining the School of Electrical and Electronic Engineering (EEE), NTU, in 1999, where he is currently an Associate Professor. He holds joint appointments with the university as Assistant Chair of Alumni of the School of EEE from June 2008 to May 2014, Deputy Director of the Center for High Performance Embedded Systems from 2000 to 2011, and Program Director of the Center for Integrated Circuits and Systems from 2003 to 2009. He has coedited four books, published ten book chapters, 87 international journal papers (two-thirds are IEEE) and 157 refereed international conference papers.His research interests are hardware security and trustable computing, residue number systems, low-power arithmetic circuits, digital filter design and digital image processing, and he has delivered many invited colloquia in these topics. Dr. Chang has served as Associate Editor for the IEEE Transactions on Circuits and Systems-I from 2010–2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems since January 2011, IEEE Access since March 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems since January 2016, IEEE Transactions on Information Forensic and Security since January 2016, Springer Journal of Hardware and System Security since June 2016, Microelectronics Journal since May 2014, Integration, the VLSI Journal from 2013–2015, Editorial Advisory Board Member of the Open Electrical and Electronic Engineering Journal from 2007–2013, and the Editorial Board Member of the Journal of Electrical and Computer Engineering from 2008–2014. He also guest edited several journal special issues (including IEEE Transactions on Circuits and Systems-I and IEEE Transactions on Dependable and Secure Computing) and served in the organizing and technical program committees of more than 50 international conferences (mostly IEEE). He was the organizer and speaker for the tutorials at the 2017 Asia and South Pacific Design Automation Conference (ASP-DAC 2017) and 2017 IEEE International Symposium on Circuits and Systems (ISCAS 2017) and organizer of five special sessions for IEEE International Symposium on Circuits and Systems from 2013 to 2016. He is a Senior Member of the IEEE and a Fellow of the IET (UK).
Research Interest
Hardware Security, Residue Number Systems, Low-power, Low-voltage and Fault-tolerant Arithmetic Circuits, Design Automation of VLSI Digital Circuits and Application-specific Digital Signal Processing Algorithm and Architectures.
Publications
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R. Muralidharan and C. H. Chang. (2011). Radix-8 Booth encoded modulo 2^n-1 multipliers with adaptive delay for high dynamic range residue number system. IEEE Transactions on Circuits and Systems I-Regular Papers, 58(5), 982-993.
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A. Cui, C. H. Chang, S. Tahar and A. A. Hamid. (2011). A robust FSM watermarking scheme for IP protection of sequential circuit design. IEEE Transactions on Computer - Aided Design of Integrated Circuits and Systems, 30(5), 678-690.
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M. R. Meher, C. C. Jong, C. H. Chang. (2011). A high bit rate serial-serial multiplier with on-the-fly accumulation by asynchronous counters. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 19(10), 1733-1745.
