Zhou Xing
Associate Professor
School of Electrical & Electronic Engineering
Nanyang Technological University
Singapore
Biography
Prof Zhou Xing has been with the School of Electrical and Electronic Engineering since he joined NTU in 1992. He obtained his BEng degree in electrical engineering from Tsinghua University in 1983, MS and PhD degrees in electrical engineering from the University of Rochester in 1987 and 1990, respectively. His past research interests include Monte Carlo simulation of photocarrier transport and ultrafast phenomena as well as mixed-mode circuit simulation and CAD tool development. His recent research focuses on nanoscale CMOS compact model development. His research group has been developing a unified core model for nanoscale bulk, SOI, double-gate, nanowire CMOS, as well as III-V HEMTs. He has given more than 100 IEEE EDS distinguished lectures and invited talks at various universities as well as industry and research institutions. He has been invited for visiting several universities, including Stanford University (1997 and 2001), Hiroshima University (2003), Universiti Teknologi Malaysia (2007), Fudan University (2011), and Tokyo Institute of Technology (2011 and 2012). He is the founding chair for the Workshop on Compact Modeling (WCM) in association with the NSTI Nanotechnology Conference since 2002. Dr. Zhou is an elected member-at-large of the IEEE EDS Administrative Committee (AdCom/BoG) in 2004–2009 and 2010–2013, EDS vice-president for Regions/Chapters in 2013, chair of the EDS Asia Pacific Subcommittee for Regions/Chapters in 2007–2012, and a member of the EDS Compact Modeling, Membership, Publications, and Educational Activities committees. He is a guest Editor-in-Chief for the special issue of the IEEE Transactions on Electron Devices on compact modeling of emerging devices. He has been a senior member of IEEE since 1999, an EDS distinguished lecturer since 2000, and an editor for the IEEE Electron Device Letters since 2007.
Research Interest
Semiconductor device physics, modeling, simulation, technology CAD, mixed-signal CAD, Monte Carlo, ultrafast phenomena. His current research works focus on nanoscale compact model development for bulk/SOI/multigate/nanowire CMOS.
Publications
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C. Q. Wei, Y.-Z. Xiong, X. Zhou, N. Singh, X.-J. Yuan, G. Q. Lo, L. Chan, and D.-L. Kwong. (2010). Comparative Study of 1/f Noise Degradation Caused by Fowler–Nordheim Tunneling Stress in Silicon Nanowire Transistors and FinFETs. IEEE Transactions on Electron Devices, 57(10), 2774-2779.
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X. Zhou, G. J. Zhu, G. H. See, K. Chandrasekaran, S. B. Chiah, and K. Y. Lim. (2011). Unification of MOS compact models with the unified regional modeling approach. Journal of Computational Electronics, 10(1), 121-135.
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S. B. Chiah, X. Zhou, L. Yuan. (2013). A Compact Zero-Temperature Coefficient Modeling Approach for MOSFETs Based on Unified Regional Modeling of Surface Potential. IEEE Transactions on Electron Devices, 60(7), 2164-2170.
