Dr. Julio Villalba Moreno
Professor
Department of Computer Architecture
Universidad de Malaga
Spain
Biography
Julio Villalba-Moreno received the B.S. degree in Physics Sciences in 1986 from the University of Granada and PhD. degree in Computer Science from the University of Málaga (SPAIN). At present he is a full professor in the Department of Computer Architecture in the Univ. Malaga. From mid 1986 to late 1991 he worked as a design engineer in the Research and Development Department of Fujitsu Spain (R&D Digital Signal Processing group). From late 1986 to 1993 he was an Assistant professor, from 1993 to 2007 he was an Associate Professor and from 2007 to nowdays he is a Full professor, all in the Department of Computer Architecture of the University of Malaga. He was a Visiting Scholar in the Department of Electrical Engineering and Computer Science of the University of California at Irvine in 1996, 2003, 2004 and 2005 for a total of one year. During these stays he did research in computer arithmetic algorithm in collaboration with Professor Tomas Lang. From 2006 to nowadays he is a member of the Program Committee of the IEEE International Symposium on Computer Arithmetic. He also belongs to the IEEE-1788 working group Standardization of Interval arithmetic. He is the leader of the group "application specific architectures and computer arithmetic" in the Dept. of Computer Architecture. He was an associate Editor of the IEEE Transactions on Computers from July 2011 to June 2015 and was serving as a Program Chair in the 22nd IEEE International Symposium on Computer Arithmetic (Lyon, France, June 22-24, 2015). His research interests are computer arithmetic, interval arithmetic, decimal arithmetic, application specific architectures and processors, FPGA designs, hardware design for image processing and digital signal processing, embedded systems, multimedia extension of processors.
Research Interest
Computer arithmetic, Application Specific Architectures and Processors, Interval arithmetic, FPGA designs, Hardware designs for Image Processing, Multimedia extension of processors
Publications
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Saez E, Villalba J, Hormigo J, Quiles FJ, Benavides JI, Zapata EL. FPGA implementation of a variable precision CORDIC processor. InProceedings of 13th conf on design of circuits and integrated systems (DCIS’98) 1998 Nov (pp. 604-609).
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Hormigo J, Villalba J, Schulte MJ. A hardware algorithm for variable-precision logarithm. InApplication-Specific Systems, Architectures, and Processors, 2000. Proceedings. IEEE International Conference on 2000 (pp. 215-224). IEEE.
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Antelo E, Villalba J, Bruguera JD, Zapata EL. High performance rotation architectures based on the radix-4 CORDIC algorithm. IEEE Transactions on Computers. 1997 Aug;46(8):855-70.
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Hormigo J, Ortiz M, Quiles F, Jaime FJ, Villalba J, Zapata EL. Efficient implementation of carry-save adders in FPGAs. InApplication-specific Systems, Architectures and Processors, 2009. ASAP 2009. 20th IEEE International Conference on 2009 Jul 7 (pp. 207-210). IEEE.