Jagadish Suryadevara
Lecturer
Lecturer in Computer Science and Information Systems
Malardalen University
Sweden
Biography
Dr Jagadish Suryadevara is currently working as a Lecturer in the Department of Lecturer in Computer Science and Information Systems, Malardalen University , Sweden. His research interests includes Formal Modelling and Analysis of Embedded Systems, oftware architectures, and real-time systems. He is serving as an editorial member and reviewer of several international reputed journals. Dr. Jagadish Suryadevara is the member of many international affiliations. He has successfully completed his Administrative responsibilities. He has authored of many research articles/books related to Formal Modelling and Analysis of Embedded Systems, oftware architectures, and real-time systems.
Research Interest
Formal Modelling and Analysis of Embedded Systems, software architectures, and real-time systems
Publications
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Verifying MARTE/CCSL Mode Behaviors using UPPAAL (Sep 2013) Jagadish Suryadevara, Cristina Seceleanu, Frederic Mallet , Paul Pettersson 11th International Conference on Software Engineering and Formal Methods
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Wind Turbine System : An Industrial Case Study in Formal Modeling and Verification (Oct 2013) Jagadish Suryadevara, Gaetana Sapienza, Cristina Seceleanu, Tiberiu Seceleanu, Stein-Erik Ellevseth , Paul Pettersson Second International Workshop on Formal Techniques for Safety-Critical Systems (FTSCS 2013)
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Analyzing a wind turbine system: From simulation to formal verification (Oct 2016) Cristina Seceleanu, Morgan Johansson , Jagadish Suryadevara, Gaetana Sapienza, Tiberiu Seceleanu, Stein-Erik Ellevseth , Paul Pettersson Science of Computer Programming, Elsevier (SCICO)
