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Conqueror UÄžurdaÄž

Associate Professor
Computer Science Department
Ozyegin University
Turkey

Biography

Dr. H. Fatih Uğurdağ, a former veteran of Silicon Valley, received his PhD from Case Western Reserve University (CWRU) in Electrical Engineering & Applied Physics in 1995. He received a BS in Electrical & Electronics Engineering (EEE) as well as a BS in Physics from Bosporus University in 1986. He went to CWRU as a TA and did an MS thesis on machine vision (finished in 1989) and a PhD dissertation on parallel HW design. He worked in the industry in the USA non-stop between 1989-2004 at companies such as GE, GM, Lucent, Juniper, and Nvidia as a machine vision engineer, EDA software developer, and chip designer. Later (2005-2010) he was a faculty member at Bahçeşehir University in the EEE Dept. and then in Computer Engineering. He is also a consultant at Vestek Pixellence R&D group of Vestel in ITU Technopark (since May 2007). Dr. Uğurdağ occasionally serves as an adjunct faculty member at Bosporus University and has ongoing funded research projects jointly conducted with Bosporus. His research interests span the areas of ASIC/SOC/FPGA design/automation, embedded systems, machine vision, educational software/web tools, and intelligent transportation systems.

Research Interest

ASIC/SOC/FPGA design/automation, embedded systems, machine vision, educational software/web tools, intelligent transportation systems

Publications

  • H.F. Ugurdag, F. Temizkan, O. Baskirt, B. Yuce, Fast Two-Pick n2n Round-Robin Arbiter Circuit, Electronics Letters (IET), vol. 48, no. 13, pp. 759-760, June 2012.

  • S. Goren, O. Ozkurt, A. Yildiz, H.F. Ugurdag, R.S. Chakraborty, D. Mukhopadhyay, Partial Bitstream Protection for Low-Cost FPGAs with Physical Unclonable Function, Obfuscation, and Dynamic Partial Self Reconfiguration, Computers and Electrical Engineering (Elsevier), vol. 39, no. 2, pp. 386-397, February 2013.

  • B. Yuce, H.F. Ugurdag, S. Goren, G. Dundar, Fast and Efficient Circuit Topologies for Finding the Maximum of n k-bit Numbers, IEEE Transactions on Computers, vol. 63, no. 8, pp. 1868-1881, August 2014

  • O. Palaz, H.F. Ugurdag, O. Ozkurt, B. Kertmen, F. Donmez, RImCom: Raster-order Image Compressor for embedded video applications (extended version), Journal of Signal Processing Systems (Springer), submitted (invited article), April 2016.

  • A. Kakacak, O. Cihangir, A.E. Guzel, S. Goren, H.F. Ugurdag, Fast Multiplier Generator for FPGAs with LUT based Partial Product Generation and Column/Row Compression, Integration, the VLSI Journal, going through 2nd revision, June 2016.

  • Y.S. Gener, S. Goren, H.F. Ugurdag, Fully Random Access Differential LUT, in preparation for submission to IEEE Transactions on Computers.

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