Peter Milder

Biography

He is an Assistant Professor of Electrical and Computer Engineering at Stony Brook University. His research combines aspects of hardware design, FPGAs, compilers, and CAD, and focuses on applications in machine learning, DSP, and networking. He has created and maintain the Spiral DFT/FFT IP Core Generator, an online tool to generate flexible hardware implementations of the discrete Fourier transform suitable for implementation as ASIC or FPGA.

Research Interest

Automatic hardware generation and optimization tools; Domain-specific languages for hardware; Field-programmable gate arrays (FPGAs); Hardware for signal processing, communication systems, computer vision, and other areas