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Ray Siferd

Ph.D.
Department of Electrical Engineering
Wright State University
United States of America

Biography

EDUCATION Institution Concentration Degree/Date Air Force Institute of Technology Electrical Engineering Ph.D. 1977 Air Force Institute of Technology Astronautical Engineering M.S. 1965 University of New Mexico Electrical Engineering M.S. 1963 Ohio State University Electrical Engineering B.E.E. 1959 ACADEMIC EXPERIENCE Institution Position Dates Wright State University Emeritus Professor 09/99-present Wright State University Chair, Dept. of Electrical Engineering 08/92-08/99 Wright State University Professor 09/96-08/99 Wright State University Associate Professor 09/86-08/96 Wright State University Assistant Professor 09/81-08/86 OTHER PROFESSIONAL EXPERIENCE Institution Position Dates Wright Patterson AFB, OH Chief 06/78-08/81 Avionics Laboratory Systems Avionics Division Wright Patterson AFB, OH Chief 08/74-07/77 Foreign Technology Division Directed Energy System Division Air Force Studies and Analysis Systems Analyst 08/69-07/72 HQ USAF, Pentagon, Washington, DC Directorate of Nuclear Safety Electrical Engineer 09/65-07/69 Kirtland AFB, New Mexico Air Force Weapons Laboratory Electrical Engineer 08/59-08/63 Kirtland, AFB, New Mexico General Motors Technical Center Electrical Engineer 06/59-07/59 Warren, MI PROFESSIONAL MEMBERSHIPS Association Status Dates Institute of Electrical & Electronics Engineers (IEEE) Member 1973-Present Tau Beta Pi Member 1957-Present Eta Kappa Nu Member 1957-Present Phi Eta Sigma Member 1955-Present 1

Research Interest

RESEARCH CONTRACTS AND GRANTS 1. “Advanced CMOS IF Receiver Stage, Phase II”, Raytheon RF Components, Jan 2007-Sept 2007, Principal Investigator, $60,000 2. “Advanced CMOS IF Receiver Stage, Phase I”, Raytheon RF Components, December 2005-December 2006, Principal Investigator, $102,000 5 3. “High Speed Read Out Integrated Circuit for IR Focal Plane Array Phase II”, RNET Technologies, April 2006-April 2008, Principal Investigator, $300,000 4. “High Speed Read Out Integrated Circuit for IR Focal Plane Array Phase I”, RNET Technologies, May 2005-Dec 2005, Principal Investigator,$33,000 5. “Wideband Array Analog to Digital Converter”, Systran Federal Corporation, June 2004-June2007, Principal Investigator,$330,000. 6. “Reconfigurable Architectures for Tactical Radio Systems”, University of Dayton Research Institute, May 2004-May 2005, Principal Investigator,$62,000. 7. “Parallel Time Interleaved Pipelined Delta Sigma Analog to Digital Converter”, Systran Federal Corporation, May 2003-Oct 2005, Principal Investigator,$300,000.

Publications

  • K. H. Abed and R. E. Siferd, “VLSI Implementation of a Low Power Antilogarithmic Converter”, IEEE Transactions on Computers Vol52, pages 1221-1228, September 2003.

  • K. H. Abed and R. E. Siferd, “CMOS VLSI Implementation of a Low Power Logarithmic Converter”, IEEE Transactions on Computers, Vol 52, pages 1421-1433, November 2003

  • Boon Cheah, Saiyu Ren, Ray Siferd, “Design Algorithm and Hardware Implementation of FIR Compensation Filter Implemented in 0.13um CMOS Technology”, WSEAS Transactions on Circuits and Systems, Issue 12, Vol 4, pages 1421-1433, December 2005.

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